This document describes ValueRAM's 2G x 64-bit (16GB) DDR4-2400 CL17 SDRAM (Synchronous DRAM), 2Rx8, non-ECC, memory module, based on sixteen 1G x 8-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR4-2400 timing of 17-17-17 at 1.2V. This 260-pin DIMM uses gold contact fingers.

• Power Supply: VDD=1.2V Typical
• VDDQ = 1.2V Typical
• VPP - 2.5V Typical
• VDDSPD=2.2V to 3.6V
• Nominal and dynamic on-die termination (ODT) for
data, strobe, and mask signals
• Low-power auto self refresh (LPASR)
• Data bus inversion (DBI) for data bus
• On-die VREFDQ generation and calibration
• Dual-rank
• On-board I2 serial presence-detect (SPD) EEPROM
• 16 internal banks; 4 groups of 4 banks each
• Fixed burst chop (BC) of 4 and burst length (BL) of 8
via the mode register set (MRS)
• Selectable BC4 or BL8 on-the-fly (OTF)
• Fly-by topology
• Terminated control command and address bus
• PCB: Height 1.18” (30.00mm)
• RoHS Compliant and Halogen-Free